1. Field of Invention
The invention relates to the technology associated with a display, and more particularly to a programming method for a display driver and the display driver using the same.
2. Related Art
With the progress of the technology, the electronic technology has been progressed from the earliest vacuum tube and transistor to the integrated circuit chip, which has the quite wide applications. Thus, the electronic products have gradually become the indispensable essentials in the life of the modern human beings. Meanwhile, the development relationship between the electronic technology and the display becomes more and more inseparatable. At present, the flat panel display has become the indispensable essential in the daily life. For example, the flat panel display can be applied to the large-scale liquid crystal display, such as a liquid crystal television or a liquid crystal computer display, and the middle-scale or small-scale liquid crystal display, such as a mobile telephone, a personal digital assistant or even a digital music mobile player.
The liquid crystal display usually has at least one built-in display driving circuit. In the driving circuit of the middle-scale or small-scale liquid crystal display, a programmable memory cell is usually built in the integrated circuit of the driving circuit in order to satisfy various panel properties or to provide more variability of the internal parameters. The programmable memory cell is typically implemented by a non-volatile memory, such as a flash memory, an erasable programmable read-only memory (EPROM) or a one-time programmable memory (OTP). In the environment where the driving circuit of the middle-scale or small-scale liquid crystal display is getting more and more diversified, the need of the usage of the programmable memory cell is getting higher and higher.
FIG. 1 is a block diagram showing a firmware program of a thin film transistor liquid crystal display (TFTLCD) driving circuit according to the prior art. Referring to FIG. 1, the circuit includes an N-bit register 101, a firmware program control unit 102, an N-bit decoder 103, a non-volatile memory 104 and a read register 105. The N-bit register 101 includes multiple M-bit sub-registers R101, and the N-bit decoder 103 is coupled to the non-volatile memory 104 through an M-bit bus.
During the programming process, when the N bits of data are to be programmed into the non-volatile memory 104, the to-be-programmed data is first programmed into the N-bit register 101. Thereafter, the firmware program control unit 102 controls the N-bit decoder 103 to select the to-be-programmed data from the N-bit register 101 and sequentially programs the to-be-programmed data into the N-bit non-volatile memory 104. When the driving circuit is operating, the firmware is read from the non-volatile memory 104 through the read register 105.
However, this architecture needs to provide the N-bit register 101 having the capacity the same as the non-volatile memory 104 in the display driving circuit to store the data to be programmed into the non-volatile memory 104. Therefore, when the data to be programmed into the non-volatile memory 104 gets more, this means that the number of bits of the non-volatile memory 104 gets greater, the register 101 to be provided is greater. In addition, the registers 101 only can be used in programming the firmware and cannot be shared with other functions. Thus, many layout areas of the integrated circuit are wasted. In addition, in order to program the firmware, the N-bit decoder 103 (N bits V.S. M bits) has to be provided according to the number of bits of the data bus of the non-volatile memory 104 so that the to-be-programmed data can be correctly selected. The N-bit decoder 103 occupies the respectable layout area in the integrated circuit.